It's all a programmable world

Field-Programmable Analog Array Terminology

As different companies enter the FPAA and FPMA markets, new terminology is bound to appear. The following is an attempt to clear up the current terminology.

  • Field-Programmable Analog Array (FPAA) - An integrated circuit which can be programmed to implement analog circuits using flexible analog blocks and interconnect.
  • Field-Programmable Mixed-Analog-Digital Array (FPMA) - An integrated circuit which contains a FPAA and a FPGA, as well as configurable converter blocks, and which can be programmed to implement mixed-signal circuits.
  • Electrically Programmable Analog Circuit (EPAC) - IMP, Inc.'s version of a FPAA; EPAC is a registered trademark of IMP, Inc.
  • Totally Reconfigurable Analog Circuit (TRAC) - Zetex Semiconductors Ltd.'s FPAA.
  • Field Programmable Analog Device (FPAD) - Zetex's (FAS) name for an FPAA.
  • Reseau analogique programmable (RAP) - French name for FPAA.
  • Configurable Analog Block (CAB) - Basic programmable analog cell on an FPAA.
  • FIeld Programmable System-On-a-Chip (FIPSOC) - SIDSA's integrated FPMA and microcontroller chip.

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"Wireless environment for data access on a server"

Wireless Environment for data access on a server.

ISBN: 9090180354
Claes Vincent
Hogeschool Limburg
Departement IWT
Diepenbeek, Limburg
2003 / 2004

I have made my thesis in association with the Universidade de Vigo by the way of an Erasmus exchange program. Because of the extra dimension which offers internalisation to my studies, I was very motivated to make my thesis abroad. I have had the pleasure to work under the guidance of Associated professor, Ph.D. Luis E Anido Rifón with support of Assistant professor, Telecommunication Engineer Luis Álvarez Sabucedo.

The mobile and wireless industry is a fast growing sector. The fast business world where we are living in today is in need for mobile professionals that have at anytime, at any place access to data. Secondly, there is a growing demand for mobility in the ICT-sector. The nature of a wireless device has moved from a simple device to a multi-purpose multimedia device that can be used for different things. These devices must be integrated with the existing information systems.

Creating a “Wireless environment for data access on a server” is making a client / server application, where the information that we would like to present on our mobile device is stored on a web-server. J2METM (Java version 2 Micro-edition) is used for programming the mobile devices, this is the little brother in the Java family. The main advantage of using J2METM is that it gives full control over the developed application. The server side has been programmed under VB.NET, a Microsoft product. For the exchange of data between the server and client we have opted for an HTTP connection over which we send an XML file.

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This is the list of common keywords used in google to get a hit on this site....
thanks all for using this keywords.

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Googlism for Belgium

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Belgian Daytrading Advice

For all those people who want to earn money... just buy some Almancora papers. The European Economic situation will come back in surplus in 2006. And this Almancora papers are an indirect investment in KBC securities (one of belgium's biggest financial institutes).
(MarketAdvices.com) Brussel - Op 27 december 2005 brengt analist Marc de Brouwer van Petercam een koopadvies uit voor het Belgische financiële concern Almancora.
(MarketAdvices.com) Brussel - Op 21 december 2005 verhoogt analist Ivan Lathouders van DeGroof zijn advies voor het Belgische financiële concern Almancora van "houden" naar "kopen".

Het 12-maands koersdoel voor Almancora is vastgesteld op 101,5 Euro.

Er zijn al veel venoten die hun aandelen verkocht hebben; maar de koers blijft stijgen... dit zou een goed teken zijn. Omdat de prijs da normaal moet dalen, maar ze blijft stijgen dit komt doordat KBC in goede papieren zit...

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Nanoswitches ?

Can someone send me some information about nanoswitches and how we can make use of this strange things?

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Optimization of DSP implementation in FPGA

Maximizing performance in FPGA systems

With programmable hard intellectual property like DSP building blocks, serdes and embedded processors, FPGAs have become complex systems-on-chip. As a result, extracting higher performance involves far more than just cranking up the fabric clock rate. Typically, one must balance a complex set of requirements-I/O bandwidth, hardware logic and/or embedded-processing performance.

Harnessing built-in FPGA features for maximum performance also takes the right combination of design techniques. Tool settings are needed that optimally implement the functional description as written in RTL code. Each phase of design development, synthesis and implementation is critical.

System architecture must be considered for effective trade-offs between programmable hardware resources. With the architecture defined and RTL code ready, synthesis tools assign the design's basic conceptual building blocks to technology cells.

In addition, designers must consider such technology mapping alternatives as trade-offs between hard IP and logic fabric. They must also use tool settings that extract maximum performance from the RTL code and the FPGA in which the design is implemented. Final implementation offers a chance to further optimize for higher performance with more-efficient packing, placement and routing. Here are some additional tips.


  • Evaluate the trade-offs between processor and programmable hardware implementations. Today's applications blend data-processing and control functions. Programmable hardware, usually logic and dedicated DSP blocks, can implement hardware algorithms that achieve nanosecond cycle times. But there are applications in which software algorithms implemented with embedded processors can provide sufficient performance and are easier to implement.
  • Employ pipelining techniques that will increase system clock frequency. Most FPGAs have abundant registers that generally have minimal impact on overall resource utilization in the design as they get packed with lookup tables. Pipelining reduces the number of combinatorial logic cells between flip-flops, thus reducing the maximum path delay. For example, some FPGAs offer fully cascadable multiply and accumulate blocks that, when configured as adder chains, can significantly improve performance for DSP filters.
  • Take advantage of the latest physical-synthesis tools. These tools reconcile front-end optimizations with the actual results derived from performing place and route. Physical synthesis tightly couples synthesis and place and route by making synthesis aware of actual timing bottlenecks early in the design. This ensures that synthesis optimizations are effectively applied to the appropriate places and that synthesis interacts with placement to deliver superior results.


  • Forget to take full advantage of the massive built-in parallelism that FPGAs offer through wider buses, bonding together several high-speed serial transceivers, or building fully parallel hardware-based algorithms using the fabric and the fully cascadable DSP blocks.
  • Forget to write your RTL description to direct the synthesis tool to use silicon-specific functions and capabilities that will enhance performance. Consider, for example, the integrated DSP block that some FPGAs offer. Properly implemented, these blocks provide ASIC-like performance, but performance can be severely impacted if the RTL coding style implies the use of an asynchronous reset. DSP blocks lose performance when this is done because their native reset is synchronous. A synchronous reset enables registers to be merged into the block, substantially improving performance and area.
  • Neglect to use retiming techniques, or the ability of the synthesis tool to move existing registers across technology cells in the design. Retiming preserves latency, so no sequential elements are added to the design. One caveat of retiming is that since some sequential elements have been moved, the design can be more difficult to verify. But retiming is usually confined to only a few paths in the design and synthesis reports notify the user about these changes.
  • Neglect to properly use the attributes that help determine how the design's conceptual blocks will be mapped onto technology cells. These attributes will direct the synthesis tool to use a certain type of cell vs. another. For example, synthesis tools would, by default, use the fabric to implement accumulators. Depending on the particular design, however, using a DSP block can be a better choice.

Adrian Cosoroaba, Virtex solutions manager at Xilinx Inc.

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What about chips in 2006? Are we gone daytrade on Silicon manufacturers?

Chips Double Up

Consolidation was also big in 2005 in data centers, as companies looked to cut the number of servers they use. In this vein, dual-core processors were a great selling point for AMD-based servers, and Intel quickly followed.

In 2006, we'll see dual and multi-core systems become the norm in both desktop and servers.

More importantly, virtualization and other software will come along that actually shows why there's a benefit of having more than one core to do the processing. And every time PC companies tout the virtues of dual and multi-core, Sun Microsystems will be right there to cheer them on and tout its own new eight-core UltraSparc T1 servers.

While IT departments have been tapping virtualization to make better use of servers, desktops will start to benefit as well in the coming year.

"Pretty soon it will become as easy to have multiple operating systems on your desktop as it is to have multiple applications without a performance penalty," said Margaret Lewis, senior software strategist at AMD.

Look for enterprise desktops to start including a standard set of virtual partitions for such things as legacy applications, personal files and apps, as well as virus protection that screens the system from infecting other users on the network.

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Get ready for the AirScooter

Get ready for the AirScooter

An inventor mostly known for his work with audio speakers is going to try to popularize the personal flying vehicle.

The AirScooter II, a personal aircraft that can hover or fly at 55 knots, is the latest invention from Elwood "Woody" Norris.


Norris, who has developed high-end stereo speakers and an alarm that signals when a hip replacement might be in trouble, is one of the founders of AirScooter, a Henderson, Nev.-based company specializing in small, light-flying vehicles. Some of its other planned products include an unmanned helicopter-like flying vehicle and a diminutive "ready to fly" model that can be assembled in 15 minutes, the company says.

The AirScooter II, though, is designed for people. It weighs around 300 pounds and doesn't require a pilot's license, according to the company's Web site. The company is seeking regulatory approval but has said it expects to release the product this year.

The AirScooter II has two rotors that function in a similar fashion to helicopter rotors, but the vehicle is easier to fly, advocates say. It sports motorcycle-style handlebars that contain flight controls, but there are no pedals--so people without the use of their legs should be able to operate it, according to the Web site. The company also offers a movie of the device in flight (click here to download the video).

Pricing has not been set, but the company expects it will sell for less than $50,000.

On his Web site, Norris compares the device's design to the first modern helicopter, created by Igor Sikorsky.

"The original Sikorsky rotorcraft helicopter concept was based on a coaxial design much like the AirScooter," Norris wrote on the company's Web site. "What we've done is package the coaxial design in a modern lightweight craft that allows for intuitive control and incredible maneuverability."

Space exploration and aviation have become two of the leading obsessions and status symbols of high-tech billionaires and entrepreneurs. Microsoft co-founder Paul Allen, for instance, funded both SpaceShipOne and the construction of a new scientific telescope on the California coast.

PayPal founder Elon Musk, meanwhile, founded SpaceX, a private rocketry company.

Ed Iacobucci, an early investor in Citrix Systems, created Jetson Systems, which is meant to help jump-start a market for flying passengers between regional cities in planes that can carry four to six people. Tickets will cost more than seats on a regular airline, but passengers wanting to go from Austin, Texas, to Memphis won't have to route through Chicago.

People Express Founder Donald Burr has put together a similar company called Pogo Jet that aims to start carrying passengers in the relatively near future.

These airlines will rely on new types of aircraft coming from companies like Eclipse, founded by Microsoft alum Vern Raburn. Eclipse counts Microsoft Chairman Bill Gates among its investors.

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